The present disclosure generally relates to metrology, and more particularly, to a metrology process for enhancing image contrast and discrimination.
In the semiconductor integrated circuit (IC) industry, there is a continuing demand for higher circuit packing densities. This demand of increased packing densities has led the semiconductor industry to develop new materials and processes to achieve sub-micron device dimensions. Manufacturing IC's at such minute dimensions adds more complexity to circuits and the demand for improved methods to inspect integrated circuits in various stages of their manufacture is ever present.
Although inspection of such products at various stages of manufacture is very important and can significantly improve production yield as well as product reliability, the increased complexity of IC's increases the cost of such inspections, both in terms of expense and time. However, if a defect can be detected early in production, the cause of the defect can be determined and corrected before a significant number of defective IC's are manufactured.
A problem with current inspection techniques is the lack of image contrast for the various layers employed in the device manufacture. problem is exacerbated as a result of higher circuit packing densities. Especially lacking is the image contrast between oxide and nitride layers in, for example, a polygate structure.
Dual beam tools combine focused ion beam, scanning electron microscopy, as well as other capabilities in a single tool. Focused ion beam (FIB) technology focuses an ion beam from an ion source through a lens and irradiates the beam onto a sample. In the fabrication of integrated circuits, FIB is frequently used to mill away (etch) material by irradiating an ion beam of relatively high current onto the substrate. The focused ion beam can be directed to a very small point on the semiconductor device and then scanned, raster fashion, over a surface where the desired material is to be removed. As an ion impinges on the semiconductor device surface, its momentum is transferred, resulting in the removal of one or more surface atoms according to a process called sputtering. By selecting a raster pattern of a given overall shape, for example a horizontal raster pattern, a correspondingly shaped area of surface material can be removed. Often several successive layers of a semiconductor device are removed in a given area in order to reach an underlying layer. However, the reaction products produced by milling have a tendency to redeposit onto the surfaces of the substrate causing contrast problems during imaging of cross sections provided by the milling process.
Injecting gases that preferentially mill particular materials, such as dielectric or conductive materials, can enhance the rate and controllability of milling. Gases are locally injected near the surface of the semiconductor device during the milling process to increase the efficiency of removing a specific type of material. As the boundaries between different materials are traversed, the type of gas injected may be changed to conform to the requirements of the new material; that is, a different gas may be used for each material or class of materials. Such techniques can be used to selectively expose the integrated circuit structure for probing or examination, cut holes through power and ground planes, and to selectively sever conductors. For example, U.S. Pat. Nos. 5,188,705 and 5,376,791 to Swanson et al. disclose the use of a focused ion beam for sputtering (etching) of semiconductor devices while directing iodine vapor toward the surface to enhance the removal of materials such as silicon and aluminum. See also U.S. Pat. No. 5,009,743 to Swann, which describes the use of dual ion guns in combination with injection of molecular iodine, and U.S. Pat. No. 4,226,666 to Winters et al., which describes etching employing electron-beam or ion-beam radiation and a noble gas halide such as XeF2, XeF4, XeF6, KrF2, KrF4 and KrF6. The use of XeF2 with FIB for preferential etching of dielectric in semiconductor devices has become commonplace as the use of XeF2 substantially increases the etching rate of dielectric relative to the etching rate of most metals so that conductors can be exposed rapidly and with less risk of electrostatic discharge damage.
New processes and materials required for the higher circuit densities have proven difficult to analyze and control with traditional top down metrology processes. Dual beam tools provide cross-sectioning capability to directly measure and image these complex structures. However, current dual beam processes do not provide adequate image contrast of all the various layers employed in the higher circuit packing densities. For example, current processes fail to provide adequate image contrast between nitride and oxide layers, or different nitride layers.
Accordingly, there remains a need for improved metrology processes for inspection of complicated circuit patterns for defect control.